1. Field of the Invention
The present invention relates to semiconductor devices and computer systems, and particularly to a semiconductor device with built-in memory which contains a CPU (Central Processing Unit) and memory on the same chip and a computer system using the semiconductor device with built-in memory.
2. Description of the Background Art
Systems such as personal computers and work stations have a microprocessor including a CPU (Central Processing Unit) for processing data, and memory for storing data. The microprocessor and the memory are packaged on a board as separate chips, wherein the two exchange data through an external data bus printed on the board.
Such systems include multi-processor systems having a plurality of microprocessors. In a multi-processor system, the plurality of microprocessors share the memory. In the multi-processor system, ordering of processes performed in parallel by the microprocessors is a problem. That is to say, it has the problem of access contention in which a plurality of microprocessors simultaneously access shared resources such as the memory.
Conventional multi-processor systems solve the problem of access contention by utilizing a semaphore. A value of the semaphore indicates that the shared resource is available, for example. A microprocessor which attempts to access the shared resource first reads the value of the semaphore. When it determines that the shared resource is accessible, it modify-writes the value of the semaphore to a new value and obtains the access right to the shared resource. The series of read modify-write access to the semaphore must be performed in an undivided manner (i.e., without being intefered with). That is, if the read and the write are separated, another microprocessor may read, between the read and the write, the value of the semaphore which has not been rewritten yet to determine that the shared resource is accessible, which will result in collision of accesses to the shared resource by the two microprocessors.
The microprocessor, which has obtained the access right to the shared resource through the procedure described above, starts access to the shared resource. On the other hand, the microprocessor which read the value of the semaphore to know that it could not obtain the access right to the shared resource enters a standby state. The values of the semaphore are stored in a memory on a chip separated from the microprocessors in conventional multi-processor systems. Conventional microprocessors have dedicated instructions and external terminals for making interlock memory access for accessing the semaphore by itself while inhibiting access to the semaphore from other microprocessors. While this instruction is executed (for example, while read-modify-write access is being made to the semaphore,) it asserts the external terminal to request an external bus controller to allow the series of memory accesses to be performed in an undivided manner. The bus controller, receiving this request, inhibits access to the semaphore from other microprocessors.